This invention relates to a bipolar device and a process for producing the same, more particularly to a high speed bipolar device suitable for use in a semiconductor integrated circuit device, and a process for production thereof.
A high speed bipolar transistor is disclosed, for example, in Japanese Patent Unexamined Publication (JP-A) No. 4-188628, wherein the bipolar transistor comprises a silicon substrate bottom portion having a reverse conductivity type impurity (hereinafter the word "impurity" is sometimes omitted for simplicity), an epitaxial growth layer having a reverse conductivity type, a device isolation film, an active region, a mono conductivity type (p- or n-type) high concentration buried layer, a monoconductivity type low concentration layer, a reverse conductivity type (e.g. p-type impurity)-containing base region, a monoconductivity type (e.g. n-type impurity)-containing emitter region, a base electrode containing a reverse conductivity type impurity in high concentration, an interlaminar insulating film, an emitter electrode, a side wall layer made of a silicon oxide film, an outer base region having a reverse conductivity type, a silicon substrate bottom portion, a collector electrode and a base wiring. Hereinafter, the term "silicon substrate" includes the epitaxial growth layer, the high concentration buried layer, the low concentration layer, the base region, the emitter region and the outer base region. In the production of the active region of the bipolar device, a base electrode containing a reverse conductivity type impurity in high concentration and an interlaminar insulating film are first deposited on the active region of the silicon substrate, followed by formation of an opening by selectively removing the base electrode and the interlaminar insulating film using a mask of a photoresist film. After depositing a silicon oxide film thereon, a side wall layer made of a silicon oxide film is formed at a side wall of the opening by etching back. Then, using this side wall layer and interlaminar insulating film as a mask, a reverse conductivity type impurity and then a monoconductivity type impurity are implanted by ion implantation. After heat treatment, a base region and an emitter region are formed, followed by formation of an emitter electrode in contact with the emitter region.
The above-mentioned process suffers from the problem that the electric characteristics on the surface of the emitter region are easily degraded due to mixing of a reverse conductivity type impurity (e.g. boron, etc.) in addition to a monoconductivity type impurity (e.g. phosphorus, arsenic, etc.) constituting the emitter region.
On the other hand, JP-A-64-36071 discloses a bipolar transistor, wherein a hollow portion surrounded by a side wall is formed in the silicon substrate in the area of an emitter region and a genuine base region, adjacent to a base region, sufficiently deeper than the level of an insulating film formed on the silicon substrate and under a base electrode so as to ensure the connection between the base region and the genuine base region, and to effectively avoid collision of the base region and the emitter region. But according to this process, the difference between the bottom level of the hollow and the level of the bottom of insulating film is so large that dislocation of the parts of the device at the side wall edge during fabrication cannot be prevented, due to an increase of stress in the end portion of the side wall layer which is in contact with the silicon substrate, resulting in degradation of electric characteristics. Further, the increase of stress in this bipolar device structure is substantial with higher integration, so that the electric characteristics are also degraded significantly.